Datasheet
M0 Vector RAM (Enabled if VMAP = 0)
M0 SARAM (1K x 16, 0-Wait)
M1 SARAM (1K x 16, 0-Wait)
0x00 0000
0x00 0040
0x00 0400
Data Space
Prog Space
Peripheral Frame 0
0x00 0800
Peripheral Frame 0
0x00 0E00
0x00 0D00
Reserved
Reserved
L0 SARAM (1K x 16)
(0-Wait, Secure Zone + ECSL, Dual Mapped)
User OTP (1K x 16, Secure Zone + ECSL)
Reserved
0x00 8400
0x3D 7800
0x3D 7C00
Reserved
FLASH
(8K x 16, 2 Sectors, Secure Zone + ECSL)
128-Bit Password
Reserved
Boot ROM (8K x 16, 0-Wait)
Vector (32 Vectors, Enabled if VMAP = 1)
0x3D 8000
0x3F 6000
0x3F 7FF8
0x3F 8000
0x3F 8400
0x3F E000
0x3F FFC0
Reserved
Peripheral Frame 1
(4K x 16, Protected)
Peripheral Frame 2
(4K x 16, Protected)
0x00 2000
0x00 6000
0x00 7000
0x00 8000
Reserved
PIE Vector - RAM
(256 x 16)
(Enabled if
VMAP = 1,
ENPIE = 1)
0x3D 7C80
Calibration Data
0x3D 7CC0
Get_mode function
0x3D 7CE0
Reserved
0x3D 7EB0
Reserved
0x3D 7E80
Calibration Data
0x3D 7FFF
PARTID
L0 SARAM (1K x 16)
(0-Wait, Secure Zone + ECSL, Dual Mapped)
TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013
www.ti.com
A. Memory locations 0x3D 7E80–0x3D 7EAF are reserved in TMX/TMP silicon.
Figure 3-5. 280200 Memory Map
20 Functional Overview Copyright © 2008–2013, Texas Instruments Incorporated
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TMS320F28020 TMS320F280200