Datasheet
TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
www.ti.com
SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013
3 Functional Overview
3.1 Memory Maps
In Figure 3-1, Figure 3-2, Figure 3-3, Figure 3-4, and Figure 3-5, the following apply:
• Memory blocks are not to scale.
• Peripheral Frame 0, Peripheral Frame 1 and Peripheral Frame 2 memory maps are restricted to data
memory only. A user program cannot access these memory maps in program space.
• Protected means the order of Write-followed-by-Read operations is preserved rather than the pipeline
order.
• Certain memory ranges are EALLOW protected against spurious writes after configuration.
• Locations 0x3D7C80 – 0x3D7CC0 contain the internal oscillator and ADC calibration routines. These
locations are not programmable by the user.
Copyright © 2008–2013, Texas Instruments Incorporated Functional Overview 15
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