Datasheet

TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022

TMS320F28021, TMS320F28020, TMS320F280200

SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013

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Table 2-2. Terminal Functions

(1)

(continued)

TERMINAL

I/O/Z DESCRIPTION

PT DA

NAME

PIN # PIN #

GPIO33 36 – I/O/Z General-Purpose Input/Output 33

SCLA I/OD I

C clock open-drain bidirectional port

EPWMSYNCO O Enhanced PWM external synch pulse output

ADCSOCBO O ADC start-of-conversion B

GPIO34 19 27 I/O/Z General-Purpose Input/Output 34

COMP2OUT O Direct output of Comparator 2. COMP2OUT signal is not available in the DA package.

– –

GPIO35 20 28 I/O/Z General-Purpose Input/Output 35

JTAG test data input (TDI) with internal pullup. TDI is clocked into the selected register

TDI I

(instruction or data) on a rising edge of TCK

GPIO36 21 29 I/O/Z General-Purpose Input/Output 36

JTAG test-mode select (TMS) with internal pullup. This serial control input is clocked

TMS I

into the TAP controller on the rising edge of TCK.

GPIO37 22 30 I/O/Z General-Purpose Input/Output 37

JTAG scan out, test data output (TDO). The contents of the selected register

TDO O/Z

(instruction or data) are shifted out of TDO on the falling edge of TCK (8 mA drive)

GPIO38 23 31 I/O/Z General-Purpose Input/Output 38

TCK I JTAG test clock with internal pullup

External Oscillator Input. The path from this pin to the clock block is not gated by the

XCLKIN I mux function of this pin. Care must be taken to not enable this path for clocking if it is

being used for the other functions.

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Product Folder Links: TMS320F28027 TMS320F28026 TMS320F28023 TMS320F28022 TMS320F28021

TMS320F28020 TMS320F280200