Datasheet

SOC0
ADCCLK
ADCRESULT 0
S/HWindowPulsetoCore
ADCCTL 1.INTPULSEPOS
ADCSOCFLG 1.SOC0
ADCINTFLG.ADCINTx
SOC1 SOC2
9 15 22 24 3720
Result 0 Latched
ADCSOCFLG 1.SOC1
ADCSOCFLG 1.SOC2
ADCRESULT 1
EOC0 Pulse
EOC1 Pulse
Conversion 0
13 ADCClocks
Minimum
7 ADCCLKs
6
ADCCLKs
Conversion 1
13 ADCClocks
Minimum
7 ADCCLKs
2 ADCCLKs
1 ADCCLK
AnalogInput
SOC1 Sample
Window
SOC0 Sample
Window
SOC2 Sample
Window
TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
www.ti.com SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013
6.11.11.3 ADC Sequential and Simultaneous Timings
Figure 6-27. Timing Example for Sequential Mode / Late Interrupt Pulse
Copyright © 2008–2013, Texas Instruments Incorporated Electrical Specifications 115
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TMS320F28020 TMS320F280200