Datasheet

TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
SPRS523J –NOVEMBER 2008–REVISED OCTOBER 2013 www.ti.com
6.11.7 I
2
C Electrical Specification and Timing
Table 6-32. I
2
C Timing
TEST CONDITIONS MIN MAX UNIT
f
SCL
SCL clock frequency I
2
C clock module frequency is between 400 kHz
7 MHz and 12 MHz and I
2
C prescaler and
clock divider registers are configured
appropriately
v
il
Low level input voltage 0.3 V
DDIO
V
V
ih
High level input voltage 0.7 V
DDIO
V
V
hys
Input hysteresis 0.05 V
DDIO
V
V
ol
Low level output voltage 3 mA sink current 0 0.4 V
t
LOW
Low period of SCL clock I
2
C clock module frequency is between 1.3 μs
7 MHz and 12 MHz and I
2
C prescaler and
clock divider registers are configured
appropriately
t
HIGH
High period of SCL clock I
2
C clock module frequency is between 0.6 μs
7 MHz and 12 MHz and I
2
C prescaler and
clock divider registers are configured
appropriately
l
I
Input current with an input voltage –10 10 μA
between 0.1 V
DDIO
and 0.9 V
DDIO
MAX
6.11.8 Serial Peripheral Interface (SPI) Master Mode Timing
Table 6-33 lists the master mode timing (clock phase = 0) and Table 6-34 lists the timing (clock
phase = 1). Figure 6-20 and Figure 6-21 show the timing waveforms.
104 Electrical Specifications Copyright © 2008–2013, Texas Instruments Incorporated
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