Digital Media System-on-Chip (DMSoC) Product Preview

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PRODUCT PREVIEW
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
Table 2-23. DM355 Pin Descriptions (continued)
Name BGA Type Group Power PU Reset Description
(4)
Mux Control
ID
(1)
Supply
(2)
PD
(3)
State
EM_WE / J15 I/O AEMI V
DD
out H Async EMIF: Write Enable PINMUX2[8].EM_W
GIO035 F / E_OE
GIO
NAND/SM/xD: WE (Write Enable) output
GIO: GIO[035]
EM_OE / F19 I/O AEMI V
DD
out H Async EMIF: Output Enable PINMUX2[8].EM_W
GIO034 F / E_OE
GIO
NAND/SM/xD: RE (Read Enable) output
GIO: GIO[034]
EM_WAIT / G18 I/O AEMI V
DD
PU in H Async EMIF: Async WAIT PINMUX2[9].EM_W
GIO033 F / AIT
GIO
NAND/SM/xD: RDY/_BSY input
GIO: GIO[033]
EM_ADV / H16 I/O AEMI V
DD
PD in L OneNAND: Address Valid Detect for PINMUX2[10].EM_A
GIO032 F / OneNAND interface DV
GIO
GIO: GIO[032]
EM_CLK / E19 I/O AEMI V
DD
out L OneNAND: Clock signal for OneNAND flash PINMUX2[11].EM_C
GIO031 F / interface LK
GIO
GIO: GIO[031]
ASP0_DX / H15 I/O ASP5 V
DD
in ASP0: Transmit Data PINMUX3[0].GIO30
GIO030 120 /
GIO
GIO: GIO[030]
ASP0_CLKX / F18 I/O ASP5 V
DD
in ASP0: Transmit Clock PINMUX3[1].GIO29
GIO029 120 /
GIO
GIO: GIO[029]
ASP0_FSX / G17 I/O ASP5 V
DD
in ASP0: Transmit Frame Synch PINMUX3[2].GIO28
GIO028 120 /
GIO
GIO: GIO[028]
ASP0_DR / E18 I/O ASP5 V
DD
in ASP0: Receive Data PINMUX3[3].GIO27
GIO027 120 /
GIO
GIO: GIO[027]
ASP0_CLKR / F17 I/O ASP5 V
DD
in ASP0: Receive Clock PINMUX3[4].GIO26
GIO026 120 /
GIO
GIO: GIO[026]
ASP0_FSR / F16 I/O ASP5 V
DD
in ASP0: Receive Frame Synch PINMUX3[5].GIO25
GIO025 120 /
GIO
GIO: GIO[025]
MMCSD1_CLK / C15 I/O MMC V
DD
in MMCSD1: Clock PINMUX3[6].GIO24
GIO024 SD /
GIO
GIO: GIO[024]
MMCSD1_CMD A17 I/O MMC V
DD
in MMCSD1: Command PINMUX3[7].GIO23
/ GIO023 SD /
GIO
GIO: GIO[023]
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