Digital Media System-on-Chip (DMSoC) Product Preview
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PRODUCT PREVIEW
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
blending for that corresponding video pixel)
• Ability to resize from VGA to NTSC/PAL (640x480 to 720x576) for both the OSD and video windows
• Horizontal rescaling x1.5 is supported
• Support for a rectangular cursor window and a programmable background color selection.
• The width, height, and color of the cursor is selectable
• The display priority is: Rectangular-Cursor > OSDWIN1 > OSDWIN0 > VIDWIN1 > VIDWIN0 >
background color
• Support for attenuation of the YCbCr values for the REC601 standard.
The following restrictions exist in the OSD module.
• If the vertical resize filter is enabled for either of the video windows, the maximum horizontal window
dimension cannot be greater than 720 currently. This is due to the limitation in the size of the line
memory.
• It is not possible to use both of the CLUT ROMs at the same time. However, a window can use RAM
while another uses ROM.
5.9.2.2 Video Encoder / Digital LCD Controller (VENC/DLCD)
The VENC/DLCD consists of three major blocks; a) the video encoder that generates analog video output,
b) the digital LCD controller that generates digital RGB/YCbCr data output and timing signals, and c) the
timing generator.
The video encoder for analog video supports the following features:
• Master Clock Input - 27 MHz (x2 Upsampling)
• Programmable Timing Generator
• SDTV Support
– Composite NTSC-M, PAL-B/D/G/H/I
– Non-Interlace option
– CGMS/WSS
– Line 21 Closed Caption Data Encoding
– Chroma Low Pass Filter 1.5MHz/3MHz
– Programmable SC-H phase
• 10-bit Over-Sampling D/A Converter (27MHz)
• Internal analog video buffer
• Optional 7.5% Pedestal
• 16-235/0-255 Input Amplitude Selectable
• Programmable Luma Delay
• Master/Slave Operation
• Internal Color Bar Generation (75%)
The digital LCD controller supports the following features:
• Programmable DCLK
• Programmable Timing Generator
• Various Output Format
– YCbCr 16bit
– YCbCr 8bit
– ITU-R BT. 656
– Parallel RGB 16-bit/18-bit
– Serial 8-bit RGB
• Low Pass Filter for Digital RGB Output
• Master/Slave Operation
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