Digital Media System-on-Chip (DMSoC) Product Preview

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PRODUCT PREVIEW
5.7.2 DDR2 Memory Controller
TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
The DDR2 / mDDR Memory Controller is a dedicated interface to DDR2 / mDDR SDRAM. It supports
JESD79D-2A standard compliant DDR2 SDRAM devices and compliant Mobile DDR SDRAM devices.
DDR2 / mDDR SDRAM plays a key role in a DM355-based system. Such a system is expected to require
a significant amount of high-speed external memory for all of the following functions:
• Buffering of input image data from sensors or video sources
• Intermediate buffering for processing/resizing of image data in the VPFE
• Numerous OSD display buffers
• Intermediate buffering for large raw Bayer data image files while performing image processing
functions
• Buffering for intermediate data while performing video encode and decode functions
• Storage of executable code for the ARM
The DDR2 / mDDR Memory Controller supports the following features:
• JESD79D-2A standard compliant DDR2 SDRAM
• Mobile DDR SDRAM
• 256 MByte memory space
• Data bus width 16 bits
• CAS latencies:
– DDR2: 2, 3, 4, and 5
– mDDR: 2 and 3
• Internal banks:
– DDR2: 1, 2, 4, and 8
– mDDR: 1, 2, and 4
• Burst length: 8
• Burst type: sequential
• 1 CS signal
• Page sizes: 256, 512, 1024, and 2048
• SDRAM autoinitialization
• Self-refresh mode
• Partial array self-refresh (for mDDR)
• Power down mode
• Prioritized refresh
• Programmable refresh rate and backlog counter
• Programmable timing parameters
• Little endian
For details on the DDR2 Memory Controller, refer to the DDR/mDDR Peripheral Reference Guide.
5.7.2.1 DDR2/mDDR Memory Controller Electrical Data/Timing
TI only supports DDR2/mDDR board designs that follow the guidelines described in the application note
titled TMS320DM355 DDR2 / mDDR Board Design Application Note. Refer to this application note for
information on board design recommendations and guidelines for DDR2 and mDDR.
Peripheral Information and Electrical Specifications112 Submit Documentation Feedback