Universal Serial Bus OHCI Host Controller User's Guide
3.13 HC Head Done Register (HCDONEHEAD)
3.14 HC Frame Interval Register (HCFMINTERVAL)
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Registers
The HC head done register (HCDONEHEAD) defines the physical address of the current head of the done
TD queue. HCDONEHEAD is shown in Figure 14 and described in Table 14 .
Figure 14. HC Head Done Register (HCDONEHEAD)
31 16
DH
R-0
15 4 3 0
DH Reserved
R-0 R-0
LEGEND: R = Read only; - n = value after reset
Table 14. HC Head Done Register (HCDONEHEAD) Field Descriptions
Bit Field Value Description
31-4 DH 0-FFF FFFFh Physical address of the last TD that has added to the done queue. This field represents bits 31-4
of the physical address of the top TD on the done TD queue. TDs are assumed to begin on a
16-byte aligned address, so bits 3-0 of this pointer are assumed to be 0.
A value of 0 indicates that there are no TDs on the done queue. This register is automatically
updated by the USB host controller.
3-0 Reserved 0 Reserved
The HC frame interval register (HCFMINTERVAL) defines the number of 12-MHZ clock pulses in each
USB frame. HCFMINTERVAL is shown in Figure 15 and described in Table 15 .
Figure 15. HC Frame Interval Register (HCFMINTERVAL)
31 30 16
FIT FSMPS
R/W-0 R/W-0
15 14 13 0
Reserved FRAMEINTERVAL
R-0 R/W-2EDFh
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 15. HC Frame Interval Register (HCFMINTERVAL) Field Descriptions
Bit Field Value Description
31 FIT 0-1 Frame interval toggle. The host controller driver must toggle this bit any time it changes
the frame interval field.
30-16 FSMPS 0-7FFFh Largest data packet. Largest data packet size allowed for full-speed packets, in bit times.
15-14 Reserved 0 Reserved
13-0 FRAMEINTERVAL 0-3FFFh Frame interval. Number of 12-MHZ clocks in the USB frame. Nominally, this is set to
11,999 (2EDFh) to give a 1-ms frame. The host controller driver can make minor changes
to this field to attempt to manually synchronize with another clock source.
SPRUFM8 – September 2008 Universal Serial Bus OHCI Host Controller 23
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