Interpolated Control (VIC) Port Reference Guide

GPIO Registers
5-11General Purpose I/O OperationSPRU629
5.1.5 Video Port Pin Data Input Register (PDIN)
The read-only video port pin data input register (PDIN) is shown in Figure 5–5
and described in Table 5–6. PDIN reflects the state of the video port pins.
When read, PDIN returns the value from the pin’s input buffer (with appropriate
synchronization) regardless of the state of the corresponding PFUNC or PDIR
bit.
Figure 5–5. Video Port Pin Data Input Register (PDIN)
31 24
Reserved
R-0
23 22 21 20 19 18 17 16
Reserved PDIN22 PDIN21 PDIN20 PDIN19 PDIN18 PDIN17 PDIN16
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
15 14 13 12 11 10 9 8
PDIN15 PDIN14 PDIN13 PDIN12 PDIN11 PDIN10 PDIN9 PDIN8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
76543210
PDIN7 PDIN6 PDIN5 PDIN4 PDIN3 PDIN2 PDIN1 PDIN0
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
Legend: R = Read only; -n = value after reset