Computer Hardware User's Guide
Index
Index-3
assembly language instructions (continued)
normalize (NORM) 13-182–13-183
parallel instructions
ABSF and STF 13-42
ABSI and STI 13-46
ADDF3 and STF 13-55
ADDI3 and STI 13-60–13-61
AND3 and STI 13-65–13-66
ASH3 and STI 13-76–13-78
FIX and STI 13-101–13-102
FLOAT and STF 13-105–13-106
LDF and LDF 13-119–13-120
LDF and STF 13-121–13-122
LDI and LDI 13-129–13-130
LDI and STI 13-131–13-132
LSH3 and STI 13-141–13-144
MPYF3 and ADDF3 13-149–13-152
MPYF3 and STF 13-153–13-154
MPYF3 and SUBF3 13-155–13-158
MPYI3 and ADDI3 13-163–13-166
MPYI3 and STI 13-167–13-168
MPYI3 and SUBI3 13-169–13-172
NEGF and STF 13-176
NEGI and STI 13-179–13-180
NOT and STI 13-186–13-187
OR3 and STI 13-192–13-193
STF and STF 13-217–13-218
STI and STI 13-221–13-222
SUBF3 and STF 13-232–13-233
SUBI3 and STI 13-237–13-238
XOR3 and STI 13-252–13-254
POP
floating-point value (POPF) 13-195
integer instruction 13-194
PUSH
floating-point value (PUSHF) 13-197
integer 13-196
register syntax 13-36
repeat
block (RPTB) 13-209–13-210
single instruction (RPTS) 13-211–13-212
restore clock to regular speed
(MAXSPEED) 13-145
return
from interrupt conditionally (RETI-
cond) 13-198–13-199
from subroutine conditionally (RETS-
cond) 13-200–13-201
assembly language instructions (continued)
rotate
left (ROL) 13-204
assembly language instructions (continued)
left through carry (ROLC) 13-205–13-206
right (ROR) 13-207
right through carry (RORC) 13-208
round floating-point value
(RND) 13-202–13-203
signal, interlocked (SIGI) 13-213
software interrupt (SWI) 13-242
store
floating-point value
(STF) 13-214
interlocked (STFI) 13-215–13-216
integer
(STI) 13-219
interlocked (STII) 13-220
subtract
floating-point value (SUBF) 13-228–13-229
integer
(SUBI) 13-234
conditionally (SUBC) 13-226–13-227
with borrow (SUBB) 13-223
reverse
floating-point value (SUBRF) 13-240
integer
(SUBRI) 13-241
with borrow (SUBRB) 13-239
symbols used to define instruc-
tions 13-33–13-37
test bit fields (TSTB) 13-245–13-246
trap conditionally (TRAPcond) 13-243–13-244
auxiliary (AR7–AR0) registers 3-4
auxiliary register
ALUs 2-8
arithmetic unit (ARAU) 6-5
definition D-1
definition D-1
B
bank switching
example 9-14, 10-18
programmable 9-12–9-14
bit-reversed, addressing 6-26–6-27
definition D-1
FFT algorithms 6-26–6-27
bitwise-exclusive OR instruction (XOR) 13-249