Computer Hardware User's Guide
Glossary
D-6
O
overflow flag (OV) bit: A status bit that indicates whether or not an arithme-
tic operation has exceeded the capacity of the corresponding register.
P
PC:
Program counte
r. A register that contains the address of the next
instruction to be fetched.
peripheral bus: A bus that is used by the CPU to communicate to the DMA
coprocessor, communication ports, and timers.
pipeline: A method of executing instructions in an assembly-line fashion.
R
RC: See repeat counter register.
read/write (R/W) pin: A memory-control signal that indicates the direction
of transfer when communicating to an external device.
register file: A bank of registers.
repeat-counter (RC) register: A 32-bit register in the CPU register file that
specifies the number of times to repeat a block of code when performing
a block repeat.
repeat mode: A zero-overhead method for repeating the execution of a
block of code. Using repeat modes allows time-critical sections of code to
be executed in the shortest possible time.
reset: A means to bring the CPU to a known state by setting the registers
and control bits to predetermined values and signaling execution to fetch
the reset vector.
reset pin: A signal that causes the device to reset.
R/W:
See read/write pin
.