Computer Hardware User's Guide

Parallel MPYI3 and ADDI3
MPYI3||ADDI3
13-163
Assembly Language Instructions
Syntax MPYI3
srcA, srcB, dst1
|| ADDI3
srcC, srcD, dst2
Operation
srcA
×
srcB
dst1
||
srcD
+
srcC
dst2
Operands
srcA
srcB
srcC
srcD
Any two indirect (
disp
= 0, 1, IR0, IR1)
Any two register (0 R
n
7)
srcA
,
srcB
,
srcC
,
srcD
can be one of the following combinations:
dst1
register (
d1
):
0 = R0
1 = R1
dst2
register (
d2
):
0 = R2
1 = R3
src1
register (R
n
, 0
n
7)
src2
register (R
n
, 0
n
7)
src3
indirect (
disp
= 0, 1, IR0, IR1)
src4
indirect (
disp
= 0, 1, IR0, IR1)
P parallel addressing modes (0 P 3)