Computer Hardware User's Guide

MPYF3||ADDF3 Parallel MPYF3 and ADDF3
13-152
Example MPYF3 *AR5++(1),*––AR1(IR0),R0
|| ADDF3 R5,R7,R3
Note: Cycle Count
One cycle if:
src3 and src4 are in internal memory
src3 is in internal memory and src4 is in external memory
Two cycles if:
src3 is in external memory and src4 is in internal memory
src3 and src4 are in external memory
For more information see Section 8.5,
Clocking Memory Accesses, on page
8-24.
Before Instruction After Instruction
R0 00 0000 0000 R0 04 6718 0000
R3 00 0000 0000 R3 08 2020 0000
R5 07 33C0 0000 R5 07 33C0 0000
R7 07 0C80 0000 R7 07 0C80 0000
AR1 80 98A8 AR1 80 98A4
AR5 80 98C5 AR5 80 98C6
IR0 4 IR0 4
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 0 N 0
Z 0 Z 0
V 0 V 0
C 0 C 0
Data memory
8098C5h 34C0000 8098C5h 34C0000
8098A4h 1110000 8098A4h 1110000
2.88867188e+0
1
6.281250e+01
2.265625e+00
3.20250e+02
1.79750e+02
1.4050e+02
1.2750e+01
1.79750e+02
1.4050e+02
1.2750e+01
2.265625e+00