Computer Hardware User's Guide
Compare Integer, 3-Operand
CMPI3
13-93
Assembly Language Instructions
Syntax CMPI3
src2, src1
Operation
src1 – src2
Operands
src1
3-operand addressing modes (T):
0 0 register (R
n
1, 0 ≤
n
1 ≤ 27)
0 1 indirect (
disp
= 0, 1, IR0, IR1)
1 0 register (R
n
1, 0 ≤
n
1 ≤ 27)
1 1 indirect (
disp
= 0, 1, IR0, IR1)
src
2 3-operand addressing modes (T):
0 0 register (R
n
2, 0 ≤
n
2 ≤ 27)
0 1 register (R
n
2, 0 ≤
n
2 ≤ 27)
1 0 indirect (
disp
= 0, 1, IR0, IR1)
1 1 indirect (
disp
= 0, 1, IR0, IR1)
Opcode
31 24 23 16 8 7 015
001000111
T
src
100000
src
2
Description The
src2
operand is subtracted from the
src1
operand. The result is not loaded
into any register, which allows for nondestructive compares. The
src1
and
src2
operands are assumed to be signed integers. Although this instruction has
only two operands, it is designated as a 3-operand instruction because oper-
ands are specified in the 3-operand format.
Cycles 1
Status Bits These condition flags are modified for all destination registers (R27–R0).
LUF Unaffected
LV 1 if an integer overflow occurs; unchanged otherwise
UF 0
N 1 if a negative result is generated; 0 otherwise
Z 1 if a 0 result is generated; 0 otherwise
V 1 if an integer overflow occurs; 0 otherwise
C 1 if a borrow occurs; 0 otherwise
OVM Operation is not affected by OVM bit value.Mode Bit