Computer Hardware User's Guide

CMPI Compare Integer
13-92
Syntax CMPI src, dst
Operation dst – src
Operands src general addressing modes (G):
0 0 register (R n , 0 ≤ n ≤ 27)
0 1 direct
1 0 indirect (disp = 0–255, IR0, IR1)
1 1 immediate
dst register (R n , 0 ≤ n ≤ 27)
Opcode
31 24 23 16 8 7 015
0000010
dst 01
G
src
Description The src operand is subtracted from the dst operand. The result is not loaded
into any register, thus allowing for nondestructive compares. The dst and src
operands are assumed to be signed integers.
Cycles 1
Status Bits These condition flags are modified for all destination registers (R27–R0).
LUF Unaffected
LV 1 if an integer overflow occurs; unchanged otherwise
UF 0
N 1 if a negative result is generated; 0 otherwise
Z 1 if a 0 result is generated; 0 otherwise
V 1 if an integer overflow occurs; 0 otherwise
C 1 if a borrow occurs; 0 otherwise
OVM Operation is not affected by OVM bit value.
Example CMPI R3,R7
Before Instruction After Instruction
R3 00 0000 0898 R3 00 0000 0898
R7 00 0000 03E8 R7 00 0000 03E8
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 0 N 1
Z 0 Z 0
V 0 V 0
C 0 C 1
2200
1000
2200
1000
Mode Bit