Computer Hardware User's Guide

Add Integer, 3-Operand ADDl3
13-59 Assembly Language Instructions
Example 1 ADDI3 R4,R7,R5
Before Instruction After Instruction
R4 00 0000 00DC R4 00 0000 00DC
R5 00 0000 0010 R5 00 0000 017C
R7 00 0000 00A0 R7 00 0000 00A0
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 0 N 0
Z 0 Z 0
V 0 V 0
C 0 C 0
220
220
16
160
380
160
Example 2 ADDI3 *–AR3(1),*AR6––(IR0),R2
Before Instruction After Instruction
R2 00 0000 0010 R2 00 0000 6598
AR3 80 9802 AR3 80 9802
AR6 80 9930 AR6 80 9918
IR0 18 IR0 18
LUF 0 LUF 0
LV 0 LV 0
UF 0 UV 0
N 0 N 0
Z 0 Z 0
V 0 V 0
C 0 C 0
Data memory
809801 2AF8 809801 2AF8
809930 3A98 809930 3A98
16
11,000
15,000
26,000
11,000
15,000
Note: Cycle Count
See Section 8.5.2, Data Loads and Stores , on page 8-24 for the effects of
operand ordering on the cycle count.