Computer Hardware User's Guide

Absolute Value of Floating Point ABSF
13-41 Assembly Language Instructions
Syntax ABSF src , dst
Operation | src | → dst
Operands src general addressing modes (G):
0 0 register (R n , 0 ≤ n ≤ 7)
0 1 direct
1 0 indirect (disp = 0–255, IR0, IR1)
1 1 immediate
dst register (R n , 0 ≤ n ≤ 7)
Opcode
31 24 23 16 8 7 015
00000 0
src 0
dst
G00
Description The absolute value of the src operand is loaded into the dst register. The src
and dst operands are assumed to be floating-point numbers.
An overflow occurs if src ( man ) = 80000000h and src ( exp ) = 7Fh. The result
is dst ( man ) = 7FFFFFFFh and dst ( exp ) = 7Fh.
Cycles 1
Status Bits These condition flags are modified only if the destination register is R7–R0.
LUF Unaffected
LV 1 if a floating-point overflow occurs; unchanged otherwise
UF 0
N 0
Z 1 if a 0 result is generated; 0 otherwise
V 1 if a floating-point overflow occurs; 0 otherwise
C Unaffected
Mode Bit OVM Operation is not affected by OVM bit value.
Example ABSF R4,R7
Before Instruction After Instruction
R4 5C 8000 F971 R4 5C 8000 F971
R7 7D 2511 00AE R7 5C 7FFF 068F
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 0 N 0
Z 0 Z 0
V 0 V 0
C 0 C 0
5.48527255e+37
–9.90337307e+27
9.90337307e+27
–9.90337307e+27