Computer Hardware User's Guide

DMA Controller
12-79 Peripherals
Transfer a 128-word block of data from on-chip memory to off-chip
memory and generate an interrupt on completion. Invert the memory or-
der; the highest addressed member of the block is to become the lowest
addressed member.
DMA source address: 809800h
DMA destination address: 800000h
DMA transfer counter: 00000080h
DMA global control: 00000C93h
CPU/DMA interrupt-enable (IE): 00000400h
Transfer a 200-word block of data from the serial-port 0 receive register
to on-chip memory and generate an interrupt on completion. Synchronize
the transfer with the serial-port 0 receive interrupt.
DMA source address: 80804Ch
DMA destination address: 809C00h
DMA transfer counter: 000000C8h
DMA global control: 00000D43h
CPU/DMA interrupt-enable (IE): 00200400h
Transfer a 200-word block of data from off-chip memory to the serial-port 0
transmit register and generate an interrupt on completion. Synchronize with
the serial-port 0 transmit interrupt.
DMA source address: 809C00h
DMA destination address: 808048h
DMA transfer counter: 000000C8h
DMA global control: 00000E13h
CPU/DMA interrupt-enable (IE): 00400400h
Transfer data continuously between the serial-port 0 receive register and
the serial-port 0 transmit register to create a digital loop back. Synchronize
with the serial-port 0 receive and transmit interrupts.
DMA source address: 80804Ch
DMA destination address: 808048h
DMA transfer counter: 00000000h
DMA global control: 00000303h
CPU/DMA interrupt-enable (IE): 00300000h