Computer Hardware User's Guide

DMA Controller
12-78
Example 12–10. DMA Transfer With Serial-Port Transmit Interrupt (Continued)
* DMA INITIALIZATION
LDI @DMA,AR0 ; POINT TO DMA GLOBAL CONTROL REGISTER
LDI @SPORT,AR1
LDI @RESET,R0
STI R0,*+AR1(4) ; RESET SPORT TIMER
STI R0,*AR0 ; RESET DMA
STI R0,*AR1 ; RESET SPORT
LDI @SOURCE,R0 ; INITIALIZE DMA SOURCE-ADDRESS REGISTER
STI R0,*+AR0(4)
LDI @DESTIN,R0 ; INITIALIZE DMA DESTINATION-ADDRESS REGISTER
STI R0,*+AR0(6)
LDI @COUNT,R0 ; INITIALIZE DMA TRANSFER COUNTER REGISTER
STI R0,*+AR0(8)
OR @IEVAL,IE ; ENABLE INTERRUPT FROM DMA TO CPU
OR 2000H,ST ; ENABLE CPU INTERRUPTS GLOBALLY
LDI @CONTROL,R0 ; INITIALIZE DMA GLOBAL CONTROL REGISTER
STI R0,*AR0 ; START DMA TRANSFER
* SERIAL PORT INITIALIZATION
LDI @SXCTRL,R0 ; SERIAL-PORT TX CONTROL REG INITIALIZATION
STI R0,*+AR1(2)
LDI @STPERIOD,R0 ; SERIAL–PORT TIMER-PERIOD INITIALIZATION
STI R0,*+AR1(6)
LDI @STCTRL,R0 ; SERIAL-PORT TIMER-CONTROL REG INITIALIZATION
STI R0,*+AR1(4)
LDI @SGCCTRL,R0 ; SERIAL-PORT GLOBAL-CONTROL REG INITIALIZATION
STI R0,*AR1
* CPU WRITES THE FIRST WORD (TRIGGERING EVENT –––> XINT IS GENERATED)
LDI @SOURCE,AR0
LDI *–AR0(1),R0
STI R0,*+AR1(8)
BU $
.END
Other examples are as follows:
Transfer a 256-word block of data from off-chip memory to on-chip
memory and generate an interrupt on completion. Maintain the memory
order.
DMA source address: 800000h
DMA destination address: 809800h
DMA transfer counter: 00000100h
DMA global control: 00000C53h
CPU/DMA interrupt enable (IE): 00000400h