Computer Hardware User's Guide

Interrupts
7-27 Program Flow Control
Table 7–4. Reset, Interrupt, and Trap-Vector Locations for the TMS320C30/
TMS320C31 Microprocessor Mode
Address Name Function
00h RESET External reset signal input
01h INT0 External interrupt on the INT0 pin
02h INT1 External interrupt on the INT1
pin
03h INT2 External interrupt on the INT2
pin
04h INT3 External interrupt on the INT3
pin
05h XINT0 Internal interrupt generated when serial port
0 transmit buffer is empty
06h RINT0 Internal interrupt generated when serial port
0 transmit buffer is full
07h XINT1
†
Internal interrupt generated when serial port
1 transmit buffer is empty
08h RINT1
†
Internal interrupt generated when serial port
1 transmit buffer is full
09h TINT0 Internal interrupt generated by timer0
0Ah TINT1 Internal interrupt generated by timer1
0Bh DINT Internal interrupt generated by DMA controller
0Ch Reserved
••
••
••
1Fh Reserved
20h TRAP 0 Internal interrupt generated by TRAP 0
instruction
•
•
•
3Bh TRAP 27 Internal interrupt generated by TRAP 27
instruction
3Ch TRAP 28 (reserved)
3Dh TRAP 29 (reserved)
3Eh TRAP 30 (reserved)
3Fh TRAP 31 (reserved)
†
Reserved on ’C31