Calculator User Manual
Table Of Contents
- Read This First
- Contents
- Figures
- Tables
- Examples
- Cautions
- Introduction
- Architectural Overview
- Central Processing Unit
- Memory and I/O Spaces
- Program Control
- Addressing Modes
- Assembly Language Instructions
- Instruction Set Summary
- How To Use the Instruction Descriptions
- Instruction Descriptions
- ABS
- ABS
- ADD
- ADD
- ADD
- ADD
- ADDC
- ADDC
- ADDS
- ADDS
- ADDT
- ADDT
- ADRK
- AND
- AND
- AND
- APAC
- APAC
- B
- BACC
- BANZ
- BANZ
- BCND
- BCND
- BIT
- BIT
- BITT
- BITT
- BLDD
- BLDD
- BLDD
- BLDD
- BLDD
- BLPD
- BLPD
- BLPD
- BLPD
- CALA
- CALL
- CC
- CC
- CLRC
- CLRC
- CMPL
- CMPR
- DMOV
- DMOV
- IDLE
- IN
- IN
- INTR
- LACC
- LACC
- LACC
- LACL
- LACL
- LACL
- LACT
- LACT
- LAR
- LAR
- LAR
- LDP
- LDP
- LPH
- LPH
- LST
- LST
- LST
- LST
- LT
- LT
- LTA
- LTA
- LTD
- LTD
- LTD
- LTP
- LTP
- LTS
- LTS
- MAC
- MAC
- MAC
- MAC
- MACD
- MACD
- MACD
- MACD
- MACD
- MAR
- MAR
- MPY
- MPY
- MPY
- MPYA
- MPYA
- MPYS
- MPYS
- MPYU
- MPYU
- NEG
- NEG
- NMI
- NOP
- NORM
- NORM
- NORM
- OR
- OR
- OR
- OUT
- OUT
- PAC
- POP
- POP
- POPD
- POPD
- PSHD
- PSHD
- PUSH
- RET
- RETC
- ROL
- ROR
- RPT
- RPT
- SACH
- SACH
- SACL
- SACL
- SAR
- SAR
- SBRK
- SETC
- SETC
- SFL
- SFR
- SFR
- SPAC
- SPH
- SPH
- SPL
- SPL
- SPLK
- SPLK
- SPM
- SQRA
- SQRA
- SQRS
- SQRS
- SST
- SST
- SUB
- SUB
- SUB
- SUB
- SUBB
- SUBB
- SUBC
- SUBC
- SUBS
- SUBS
- SUBT
- SUBT
- TBLR
- TBLR
- TBLR
- TBLW
- TBLW
- TBLW
- TRAP
- XOR
- XOR
- XOR
- ZALR
- ZALR
- On-Chip Peripherals
- Synchronous Serial Port
- Asynchronous Serial Port
- TMS320C209
- Register Summary
- TMS320C1x/C2x/C2xx/C5x Instruction Set Comparison
- Program Examples
- Submitting ROM Codes to TI
- Design Considerations for Using XDS510 Emulator
- E.1 Designing Your Target System’s Emulator Connector (14-Pin Header)
- E.2 Bus Protocol
- E.3 Emulator Cable Pod
- E.4 Emulator Cable Pod Signal Timing
- E.5 Emulation Timing Calculations
- E.6 Connections Between the Emulator and the Target System
- E.7 Physical Dimensions for the 14-Pin Emulator Connector
- E.8 Emulation Design Considerations
- Glossary
- Index

Conditional Branches, Calls, and Returns
5-12
The conditional branch instructions are BCND (branch conditionally) and
BANZ (branch if currently selected auxiliary register is not equal to 0). The
BANZ instruction is useful for implementing loops.
5.4.4 Conditional Calls
The conditional call (CC) instruction is executed only when the specified condi-
tion or conditions are met (see Table 5–3 on page 5-10). This allows your pro-
gram to choose among multiple subroutines based on the data being pro-
cessed. If all the conditions are met, the PC is loaded with the second word
of the call instruction, which contains the starting address of the subroutine.
Before branching to the subroutine, the processor stores the address of the
instruction following the call instruction—the return address—to the stack. The
function must end with a return instruction, which will take the return address
off the stack and force the processor to resume execution of the calling pro-
gram.
By the time the conditions of the conditional call instruction have been tested,
the two instruction words following the call instruction have already been
fetched in the pipeline. If all the conditions are met, these two instruction words
are flushed from the pipeline so that they are not executed, and then execution
continues at the beginning of the called function. If the conditions are
not
met,
the two instructions are executed instead of the call. Because there is a wait
cycle for conditions to become stable, the conditional call takes one more cycle
than the unconditional one.
5.4.5 Conditional Returns
Returns are used in conjunction with calls and interrupts. A call or interrupt
stores a return address to the stack and then transfers program control to a
new location in program memory. The called subroutine or the interrupt service
routine concludes with a return instruction, which pops the return address off
the top of the stack and into the program counter (PC).
The conditional return instruction (RETC) is executed only when one or more
conditions are met (see Table 5–3 on page 5-10). By using the RETC instruc-
tion, you can give a subroutine or interrupt service routine more than one pos-
sible return path. The path chosen then depends on the data being processed.
In addition, you can use a conditional return to avoid conditionally branching
to/around the return instruction at the end of the subroutine or interrupt service
routine.
If all the conditions are met for execution of the RETC instruction, the proces-
sor loads the return address from the stack to the PC and resumes execution
of the calling or interrupted program.