Datasheet

SYSRS

SYSCLKOUT

Control

I2CINT1A

I2CINT2A

C28x CPU

GPIO

MUX

Peripheral Bus

I C-A

System Control Block

I2CAENCLK

PIE

Block

SDAA

SCLA

Data[16]

Addr[16]

TMS320C28346, TMS320C28345, TMS320C28344

TMS320C28343, TMS320C28342, TMS320C28341

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SPRS516D –MARCH 2009–REVISED AUGUST 2012

4.12 Inter-Integrated Circuit (I2C)

The device contains one I2C Serial Port. Figure 4-15 shows how the I2C peripheral module interfaces

within the device.

A. The I2C registers are accessed at the SYSCLKOUT rate. The internal timing and signal waveforms of the I2C port are

also at the SYSCLKOUT rate.

B. The clock enable bit (I2CAENCLK) in the PCLKCR0 register turns off the clock to the I2C port for low power

operation. Upon reset, I2CAENCLK is clear, which indicates the peripheral internal clocks are off.

Figure 4-15. I2C Peripheral Module Interfaces

The I2C module has the following features:

• Compliance with the Philips Semiconductors I2C-bus specification (version 2.1):

– Support for 1-bit to 8-bit format transfers

– 7-bit and 10-bit addressing modes

– General call

– START byte mode

– Support for multiple master-transmitters and slave-receivers

– Support for multiple slave-transmitters and master-receivers

– Combined master transmit/receive and receive/transmit mode

– Data transfer rate from 10 kbps up to 400 kbps (I2C Fast-mode rate)

• One 16-word receive FIFO and one 16-word transmit FIFO

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Product Folder Link(s): TMS320C28346, TMS320C28345, TMS320C28344 TMS320C28343, TMS320C28342,

TMS320C28341