Datasheet
TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
www.ti.com
SPRS516D –MARCH 2009–REVISED AUGUST 2012
4 Peripherals
The integrated peripherals are described in the following subsections:
• 6-channel Direct Memory Access (DMA)
• Three 32-bit CPU-Timers
• Up to nine enhanced PWM modules (ePWM1, ePWM2, ePWM3, ePWM4, ePWM5, ePWM6, ePWM7,
ePWM8, ePWM9)
• Up to six enhanced capture modules (eCAP1, eCAP2, eCAP3, eCAP4, eCAP5, eCAP6)
• Up to three enhanced QEP modules (eQEP1, eQEP2, eQEP3)
• External analog-to-digital converter (ADC) Interface
• Up to two enhanced controller area network (eCAN) modules (eCAN-A, eCAN-B)
• Up to three serial communications interface modules (SCI-A, SCI-B, SCI-C)
• Up to two serial peripheral interface (SPI) modules (SPI-A, SPI-D)
• Inter-integrated circuit module (I2C)
• Up to two multichannel buffered serial port (McBSP-A, McBSP-B) modules
• Digital I/O and shared pin functions
• External Interface (XINTF)
4.1 DMA Overview
Features:
• 6 Channels with independent PIE interrupts
• Trigger Sources:
– McBSP-A and McBSP-B transmit and receive logic
– XINT1–7 and XINT13
– CPU Timers
– Software
• Data Sources/Destinations:
– L0–L7 64K × 16 SARAM
– All XINTF zones
– McBSP-A and McBSP-B transmit and receive buffers
• Word Size: 16-bit or 32-bit (McBSPs limited to 16-bit)
• Throughput: 4 cycles/word (5 cycles/word for McBSP reads)
Copyright © 2009–2012, Texas Instruments Incorporated Peripherals 61
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TMS320C28341