Datasheet

TMS320C28346, TMS320C28345, TMS320C28344

TMS320C28343, TMS320C28342, TMS320C28341

SPRS516D –MARCH 2009–REVISED AUGUST 2012

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6-6 Warm Reset ..................................................................................................................... 121

6-7 Example of Effect of Writing Into PLLCR Register ......................................................................... 122

6-8 General-Purpose Output Timing .............................................................................................. 123

6-9 Sampling Mode ................................................................................................................. 123

6-10 General-Purpose Input Timing ................................................................................................ 124

6-11 IDLE Entry and Exit Timing.................................................................................................... 125

6-12 STANDBY Entry and Exit Timing Diagram .................................................................................. 126

6-13 HALT Wake-Up Using GPIOn................................................................................................. 127

6-14 PWM Hi-Z Characteristics ..................................................................................................... 128

6-15 ADCSOCAO or ADCSOCBO Timing ........................................................................................ 131

6-16 External Interrupt Timing....................................................................................................... 131

6-17 SPI Master Mode External Timing (Clock Phase = 0) ..................................................................... 134

6-18 SPI Master Mode External Timing (Clock Phase = 1) ..................................................................... 136

6-19 SPI Slave Mode External Timing (Clock Phase = 0)....................................................................... 138

6-20 SPI Slave Mode External Timing (Clock Phase = 1)....................................................................... 139

6-21 Relationship Between XTIMCLK and SYSCLKOUT ....................................................................... 143

6-22 Example Read Access ......................................................................................................... 146

6-23 Example Write Access ......................................................................................................... 148

6-24 Example Read With Synchronous XREADY Access ...................................................................... 150

6-25 Example Read With Asynchronous XREADY Access ..................................................................... 151

6-26 Write With Synchronous XREADY Access.................................................................................. 153

6-27 Write With Asynchronous XREADY Access ................................................................................ 154

6-28 External Interface Hold Waveform............................................................................................ 156

6-29 McBSP Receive Timing........................................................................................................ 159

6-30 McBSP Transmit Timing ....................................................................................................... 159

6-31 McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 0................................................... 160

6-32 McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 0................................................... 161

6-33 McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 1................................................... 162

6-34 McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 1................................................... 163