Datasheet
Block
Start Address
0x000000
M0Vector-RAM(32x32)
(EnableifVMAP =0)
DataSpace
ProgSpace
M0SARAM(1Kx16)
M1SARAM(1Kx16)
PeripheralFrame0
0x000040
0x000400
0x000800
PIEVector-RAM
(256x16)
(Enabledif
VMAP =1,
ENPIE=1)
Reserved
Reserved
L0SARAM(8Kx16, )DMA Accessible
PeripheralFrame1
(Protected)
Reserved
PeripheralFrame2
(Protected)
L1SARAM(8Kx16, )
DMA Accessible
Reserved
BootROM(8Kx16)
BROMVector-ROM(32x32)
(EnableifVMAP =1,ENPIE=0)
0x000D00
0x000E00
0x002000
0x006000
0x007000
0x008000
0x00 A000
0x3FFFC0
DataSpace
ProgSpace
Reserved
XINTFZone0(4Kx16, )
(Protected)
XZCS0
DMA Accessible
Reserved
On-ChipMemory ExternalMemoryXINTF
Onlyoneofthesevectormaps-M0vector,PIEvector,BROMvector-shouldbeenabledatatime.
LEGEND:
L2SARAM(8Kx16, )DMA Accessible
L3SARAM(8Kx16, )DMA Accessible
0x00C000
0x00E000
0x010000
Reserved
0x004000
0x005000
0x005000
PeripheralFrame3
(Protected)DMA Accessible
0x33FFF8
0x33FFFF
0x3FE000
PeripheralFrame0
XINTFZone6(1Mx16, )(DMA Accessible)XZCS6
0x100000
0x200000
0x300000
XINTFZone7(1Mx16, )XZCS7 (DMA Accessible)
H0SARAM
(32Kx16Prefetch)
0x300000
0x308000
0x310000
H1SARAM
(32Kx16Prefetch)
128-BitPassword
(A)
Reserved
Reserved
TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
SPRS516D –MARCH 2009–REVISED AUGUST 2012
www.ti.com
A. These locations support compatibility with legacy C28x designs only. See Section 3.2.9.
Figure 3-4. C28342, C28341 Memory Map
38 Functional Overview Copyright © 2009–2012, Texas Instruments Incorporated
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TMS320C28341