Datasheet

TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
www.ti.com SPRS516D –MARCH 2009–REVISED AUGUST 2012
3.1 Memory Maps
In Figure 3-2 through Figure 3-4, the following apply:
• Memory blocks are not to scale.
• Peripheral Frame 0, Peripheral Frame 1, Peripheral Frame 2, and Peripheral Frame 3 memory maps
are restricted to data memory only. A user program cannot access these memory maps in program
space.
• Protected means the order of "Write followed by Read" operations is preserved rather than the pipeline
order. See the TMS320x2834x Delfino System Control and Interrupts Reference Guide (literature
number SPRUFN1) for more details.
• Certain memory ranges are EALLOW protected against spurious writes after configuration.
• If the eCAN module is not used in an application, the RAM available (LAM, MOTS, MOTO, and
mailbox RAM) can be used as general-purpose RAM. The CAN module clock should be enabled for
this.
Copyright © 2009–2012, Texas Instruments Incorporated Functional Overview 35
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