Datasheet

L0SARAM8Kx16
(0-Wait)
L1SARAM8Kx16
(0-Wait)
L2SARAM8Kx16
(0-Wait)
L3SARAM8Kx16
(0-Wait)
L4SARAM8Kx16
(0-Wait)
L5SARAM8Kx16
(0-Wait)
BootROM
8Kx16
DMA Bus
XINTF
XWE0
XZCS6
XZCS7
XZCS0
XR/W
XREADY
XHOLD
XHOLDA
XD31:0
XA19:1
GPIO
MUX
MemoryBus
MemoryBus
XCLKOUT
XRD
GPIO
MUX
88GPIOs
8ExternalInterrupts
88GPIOs
ADC
SoC
EXTADCCLK
EXTSOC
CPUTimer0
CPUTimer1
CPUTimer2
OSC,
PLL,
LPM,
WD
DMA
6Ch
PIE
(Interrupts)
32-bitCPU
(300MHz@1.2V
200MHz@1.1V)
EMU1
EMU0
TRST
TDO
TMS
TDI
TCK
XRS
X2
X1
XCLKIN
FPU
DMA Bus
MemoryBus
FIFO
(16Levels)
SCI-A/B/C
FIFO
(16Levels)
SPI-A/D
FIFO
(16Levels)
I2C
16-bitperipheralbus
SPISOMIx SPISIMOx
SPICLKx
SPISTEx
SCIRXDx
SCITXDx
SDAx
SCLx
McBSP-A/B
MRXx
MDXx
MCLKXx
MCLKRx
MFSXx
MFSRx
32-bitperipheralbus
(DMA accessible)
ePWM-1/../9
HRPWM-1/../9
eCAP-1/../6
eQEP-1/2/3
EPWMxA EPWMxB
ESYNCI
ESYNCO
TZx
ECAPx
EQEPxA EQEPxB
EQEPxI
EQEPxS
CAN-A/B
(32-mbox)
CANRXx
CANTXx
M0SARAM1Kx16
(0-Wait)
M1SARAM1Kx16
(0-Wait)
MemoryBus
32-bitperipheralbus
GPIOMUX
88GPIOs
XWE1
H0SARAM32Kx16
(1Wait,Prefetch)
H1SARAM32Kx16
(1Wait,Prefetch)
H2SARAM32Kx16
(1Wait,Prefetch)
H3SARAM32Kx16
(1Wait,Prefetch)
H4SARAM32Kx16
(1Wait,Prefetch)
H5SARAM32Kx16
(1Wait,Prefetch)
L6SARAM8Kx16
(1-Wait)
L7SARAM8Kx16
(1-Wait)
DMA Bus
TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
SPRS516D –MARCH 2009–REVISED AUGUST 2012 www.ti.com
3 Functional Overview
Figure 3-1. Functional Block Diagram
34 Functional Overview Copyright © 2009–2012, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TMS320C28346, TMS320C28345, TMS320C28344 TMS320C28343, TMS320C28342,
TMS320C28341