Datasheet

TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
www.ti.com SPRS516D –MARCH 2009–REVISED AUGUST 2012
Table 2-2. Signal Descriptions (continued)
ZHH ZFE
NAME DESCRIPTION
BALL # BALL #
GPIO37 General-Purpose Input/Output 37 (I/O/Z)
ECAP2 D11 B12 Enhanced Capture input/output 2 (I/O)
XZCS7 External Interface zone 7 chip select (O)
General-Purpose Input/Output 38 (I/O/Z)
GPIO38
-
- C12 E15
External Interface Write Enable 0 (O). XWE0 defaults back to GPIO38 upon reset, during which
XWE0
time it will be high-impedance.
GPIO39 General-Purpose Input/Output 39 (I/O/Z)
- A2 B4 -
XA16 External Interface Address Line 16 (O)
GPIO40 General-Purpose Input/Output 40 (I/O/Z)
- E10 C12 -
XA0 External Interface Address Line 0
GPIO41 General-Purpose Input/Output 41 (I/O/Z)
- D10 B11 -
XA1 External Interface Address Line 1 (O)
GPIO42 General-Purpose Input/Output 42 (I/O/Z)
- B10 C11 -
XA2 External Interface Address Line 2 (O)
GPIO43 General-Purpose Input/Output 43 (I/O/Z)
- A10 B10 -
XA3 External Interface Address Line 3 (O)
GPIO44 General-Purpose Input/Output 44 (I/O/Z)
- A9 C10 -
XA4 External Interface Address Line 4 (O)
GPIO45 General-Purpose Input/Output 45 (I/O/Z)
- B9 C9 -
XA5 External Interface Address Line 5 (O)
GPIO46 General-Purpose Input/Output 46 (I/O/Z)
- E7 B8 -
XA6 External Interface Address Line 6 (O)
GPIO47 General-Purpose Input/Output 47 (I/O/Z)
- D6 C8 -
XA7 External Interface Address Line 7 (O)
GPIO48 General-Purpose Input/Output 48 (I/O/Z)
ECAP5 Enhanced Capture input/output 5 (I/O)
M10 R11
XD31 External Interface Data Line 31 (O)
SPISIMOD SPI-D slave in, master out (I/O)
GPIO49 General-Purpose Input/Output 49 (I/O/Z)
ECAP6 Enhanced Capture input/output 6 (I/O)
P10 P11
XD30 External Interface Data Line 30 (O)
SPISOMID SPI-D slave out, master in (I/O)
GPIO50 General-Purpose Input/Output 50 (I/O/Z)
EQEP1A Enhanced QEP 1input A (I)
N10 T12
XD29 External Interface Data Line 29 (O)
SPICLKD SPI-D Clock input/output (I/O)
GPIO51 General-Purpose Input/Output 51 (I/O/Z)
EQEP1B Enhanced QEP 1input B (I)
N11 R12
XD28 External Interface Data Line 28 (O)
SPISTED SPI-D slave transmit enable input/output (I/O)
GPIO52 General-Purpose Input/Output 52 (I/O/Z)
EQEP1S M11 P12 Enhanced QEP 1Strobe (I/O)
XD27 External Interface Data Line 27 (O)
GPIO53 General-Purpose Input/Output 53 (I/O/Z)
EQEP1I L11 T13 Enhanced QEP1 lndex (I/O)
XD26 External Interface Data Line 26 (O)
GPIO54 General-Purpose Input/Output 54 (I/O/Z)
SPISIMOA SPI-A slave in, master out (I/O)
P12 R13
XD25 External Interface Data Line 25 (O)
EQEP3A Enhanced QEP3 input A (I)
Copyright © 2009–2012, Texas Instruments Incorporated Introduction 27
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TMS320C28341