Computer Hardware Algorithm Standard User's Guide
Table Of Contents
- Table of Contents
- Preface
- 1 Overview
- 2 General Programming Guidelines
- 3 Algorithm Component Model
- 3.1 Interfaces and Modules
- 3.1.1 External Identifiers
- 3.1.2 Naming Conventions
- 3.1.3 Module Initialization and Finalization
- 3.1.4 Module Instance Objects
- 3.1.5 Design-Time Object Creation
- 3.1.6 Run-Time Object Creation and Deletion
- 3.1.7 Module Configuration
- 3.1.8 Example Module
- 3.1.9 Multiple Interface Support
- 3.1.10 Interface Inheritance
- 3.1.11 Summary
- 3.2 Algorithms
- 3.3 Packaging
- 3.1 Interfaces and Modules
- 4 Algorithm Performance Characterization
- 5 DSP-Specific Guidelines
- 6 Use of the DMA Resource
- 6.1 Overview
- 6.2 Algorithm and Framework
- 6.3 Requirements for the Use of the DMA Resource
- 6.4 Logical Channel
- 6.5 Data Transfer Properties
- 6.6 Data Transfer Synchronization
- 6.7 Abstract Interface
- 6.8 Resource Characterization
- 6.9 Runtime APIs
- 6.10 Strong Ordering of DMA Transfer Requests
- 6.11 Submitting DMA Transfer Requests
- 6.12 Device Independent DMA Optimization Guideline
- 6.13 C6xxx Specific DMA Rules and Guidelines
- 6.14 C55x Specific DMA Rules and Guidelines
- 6.15 Inter-Algorithm Synchronization
- A Rules and Guidelines
- B Core Run-Time APIs
- C Bibliography
- D Glossary
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5.4.3 Register Conventions
5.4.4 Status Registers
TMS320C54xx Rules and Guidelines
This section describes the rules and guidelines that apply to the use of the TMS320C54xx on-chip
registers. As described above, there are several different register types. Note that any register that is not
described here must not be accessed by an algorithm; e.g., BSCR, IFR, IMR, and peripheral control and
status registers.
The table below describes all of the registers that may be accessed by an algorithm
Register Use Type
AR0, AR2-AR5 C compiler expression registers Scratch (local)
AR7 C compiler frame pointer Preserve (local)
AR1, AR6 C compiler register variables Preserve (local)
AL, AH, AG Return value from C function, first parameter to function Scratch (local)
BL, BH, BG C compiler expression registers Scratch (local)
BK Circular-buffer size register Scratch (local)
BRC Block repeat counter Scratch (local)
IFR, IMR Interrupt flag and mask register Read-only (global)
PMST Processor mode register Preserve
RSA, REA Block repeat start and end register Scratch (local)
SP Stack pointer Preserve (local)
ST0, ST1 Status registers Preserve
T Multiply and shift operand Scratch (local)
TRN Viterbi transition register Scratch (local)
XPC Extended Program Counter Scratch (local)
The C54xx contains three status registers: ST0, ST1, and PMST. Each status register is further divided
into several distinct fields. Although each field is often thought of as a separate register, it is not possible
to access these fields individually. In order to set one field, it is necessary to set all fields in the same
status register. Therefore, it is necessary to treat the status registers with special care. For example, if any
field of a status register is of type Preserve, the entire register must be treated as a Preserve register.
ST0 Field Name Use Type
ARP Auxiliary register pointer Init (local)
C Carry bit Scratch (local)
DP Data page pointer Scratch (local)
OVA Overflow flag for accumulator A Scratch (local)
OVB Overflow flag for accumulator B Scratch (local)
TC Test/Control flag Scratch (local)
The ST1 register is of type Init.
ST1 Field Name Use Type
ASM Accumulator shift mode Scratch (local)
BRAF Block repeat active bit Preserve (local)
C16 Dual 16-bit math bit Init (local)
CMPT Compatibility mode bit Init (local)
CPL Compiler mode bit Init (local)
FRCT Fractional mode bit Init (local)
HM Hold mode bit Preserve (local)
SPRU352G – June 2005 – Revised February 2007 DSP-Specific Guidelines 51
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