Datasheet

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SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007

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Frame 1 Two−Wire Slave Address Byte Frame 2 Pointer Register Byte

Start By

Master

ACK By

TMP175 or TMP75

ACK By

TMP175 or TMP75

Frame3Two−WireSlaveAddressByte Frame4DataByte1ReadRegister

Start By

Master

ACK By

TMP175 or TMP75

ACK By

Master

From

TMP175 or TMP75

191 9

SDA

SCL

001 R/W 000000P1P0

…

SDA

(Continued)

SCL

(Continued)

SDA

(Continued)

SCL

(Continued)

1001

000

R/W

D7 D6 D5 D4 D3 D2 D1 D0

Frame 5 Data Byte 2 Read Register NOTE: Address Pins A0, A1, A2 = 0

Stop By

Master

ACK By

Master

From

TMP175 or TMP75

D7 D6 D5 D4 D3 D2 D1 D0

Figure 7. Two-Wire Timing Diagram for Read Word Format

Frame 1 SMBus ALERT Response Address Byte Frame 2 Slave Address Byte

Start By

Master

ACK By

TMP175 or TMP75

From

TMP175 or TMP75

NACK By

Master

Stop By

Master

191 9

SDA

SCL

ALERT

0001100R/W 1001000

Status

NOTE: Address Pins A0, A1, A2 = 0

Figure 8. Timing Diagram for SMBus ALERT