Datasheet

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SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007

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Frame 1 Two−Wire Slave Address Byte

Frame 2 Pointer Register Byte

Frame 4 Data Byte 2

Start By

Master

ACK By

TMP75

ACK By

TMP75

ACK By

TMP75

Stop By

Master

191

D7 D6 D5 D4 D3 D2 D1 D0

Frame 3 Data Byte 1

ACK By

TMP75

SDA

(Continued)

SCL

(Continued)

D6 D5 D4 D3 D2 D1 D0

SDA

SCL

0 0 1 A2A1A0R/W 0 0 0 0 0 0 P1 P0

…

Figure 5. Two-Wire Timing Diagram for TMP75 Write Word Format

Frame 1 Two−Wire Slave Address Byte Frame 2 Pointer Register Byte

Frame 4 Data Byte 2

Start By

Master

ACK By

TMP175

ACK By

TMP175

ACK By

TMP175

Stop By

Master

191

D7 D6 D5 D4 D3 D2 D1 D0

Frame 3 Data Byte 1

ACK By

TMP175

SDA

(Continued)

SCL

(Continued)

D6 D5 D4 D3 D2 D1 D0

SDA

SCL

A6 A5 A4 A3 A2

A1A0R/W 000000P1P0

…

Figure 6. Two-Wire Timing Diagram for TMP175 Write Word Format