Datasheet
Frame1Two-WireSlaveAddressByte
Frame2PointerRegisterByte
Frame4DataByte2
1
StartBy
Master
ACKBy
TMP441/42
ACKBy
TMP441/42
ACKBy
TMP441/42
StopBy
Master
1 9 1
1
D7 D6 D5 D4 D3 D2 D1 D0
9
Frame3DataByte1
ACKBy
TMP441/42
1
D7
SDA
(Continued)
SCL
(Continued)
D6 D5 D4 D3 D2 D1 D0
9
9
SDA
SCL
0 0 1 1 0 0
(1)
R/W P7 P6 P5 P4 P3 P2 P1 P0
¼
¼
NOTE:(1)Slaveaddress1001100shown.
Frame1Two-WireSlaveAddressByte Frame2PointerRegisterByte
1
StartBy
Master
ACKBy
TMP441/42
ACKBy
TMP441/42
Frame3Two-WireSlaveAddressByte Frame4DataByte1ReadRegister
StartBy
Master
ACKBy
TMP441/42
NACKBy
Master
(2)
From
TMP441/42
1 9 1
9
1 9 1
9
SDA
SCL
0 0 1 R/
W P7 P6 P5 P4 P3 P2 P1 P0
¼
¼
¼
¼
SDA
(Continued)
SCL
(Continued)
1 0 0 1
1 0 0
(1)
1 0 0
(1)
R/W D7 D6 D5 D4 D3 D2 D1 D0
(1)Slaveaddress1001100shown.
(2)MastershouldleaveSDAhightoterminateasingle-bytereadoperation.
NOTES:
TMP441
TMP442
SBOS425A – DECEMBER 2008 – REVISED MARCH 2009 ..............................................................................................................................................
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Figure 16. Two-Wire Timing Diagram for Write Word Format
Figure 17. Two-Wire Timing Diagram for Single-Byte Read Format
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