Datasheet
1
2
3
4
8
7
6
5
TMP431
0.1 FCapacitorm
PCBVia
PCBVia
V+
GND
DXP
DXN
1
10
2
3
4
8
7
6
5
9
TMP432
0.1 FCapacitorm
PCBVia
PCBVia
V+
GND
DXP1
DXP2
DXN1
DXN2
V+
DXP
DXN
GND
GroundorV+layer
onbottomand/or
top,ifpossible.
TMP431
TMP432
SBOS441F –SEPTEMBER 2009–REVISED AUGUST 2013
www.ti.com
LAYOUT CONSIDERATIONS
Remote temperature sensing on the TMP431/32
measures very small voltages using very low
currents; therefore, noise at the IC inputs must be
minimized. Most applications using the TMP431/32
have high digital content, with several clocks and
logic level transitions creating a noisy environment.
Layout should conform to the following guidelines:
1. Place the TMP431/32 as close to the remote
junction sensor as possible.
2. Route the DXP and DXN traces next to each
other and shield them from adjacent signals
through the use of ground guard traces, as
shown in Figure 24. If a multilayer PCB is used,
bury these traces between ground or V
DD
planes
to shield them from extrinsic noise sources. 5 mil
Note: Use 5 mil (.005 in, or 0,127 mm) traces
(0,127 mm) PCB traces are recommended.
with 5 mil (.005 in, or 0,127 mm) spacing.
3. Minimize additional thermocouple junctions
caused by copper-to-solder connections. If these
Figure 24. Example Signal Traces
junctions are used, make the same number and
approximate locations of copper-to-solder
connections in both the DXP and DXN
connections to cancel any thermocouple effects.
4. Use a 0.1μF local bypass capacitor directly
between the V+ and GND of the TMP431/32.
Figure 25 shows the suggested bypass capacitor
placement for the TMP431/32. This capacitance
includes any cable capacitance between the
remote temperature sensor and TMP431/32.
5. If the connection between the remote
temperature sensor and the TMP431/32 is less
than 8 inches (20,32 cm), use a twisted-wire pair
connection. Beyond 8 inches, use a twisted,
shielded pair with the shield grounded as close to
the TMP431/32 as possible. Leave the remote
sensor connection end of the shield wire open to
avoid ground loops and 60Hz pickup.
6. Thoroughly clean and remove all flux residue in
and around the pins of the TMP431/32 to avoid
temperature offset readings as a result of leakage
paths between DXP or DXN and GND, or
between DXP or DXN and V+.
Figure 25. Suggested Bypass Capacitor
Placement
32 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: TMP431 TMP432