Datasheet

Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte
1
Start By
Master
ACK By
TMP431A/32A/31C
ACK By
TMP431 A/31CA/32
Frame 3 Two-Wire Slave Address Byte Frame 4 Data Byte 1 Read Register
Start By
Master
ACK By
TMP431 A/31CA/32
NACK By
Master
(2)
From
TMP431 A/31CA/32
1 9 1
9
1 9 1 9
SDA
SCL
0 0 1 R/W
P7 P6 P5 P4 P3 P2 P1 P0
SDA
(Continued)
SCL
(Continued)
1 0 0 1
1 0 0
(1)
1 0 0
(1)
R/W
D7 D6 D5 D4 D3 D2 D1 D0
(1) Slave address 1001100 (TMP431A/32A/31C) shown. Slave address changes for TMP431B/32B/31D. See table for more details.Ordering Information
(2) Master should leave SDA high to terminate a single-byte read operation.
NOTES:
Frame 1 Two- Wire Slave Address Byte
Frame 2 Pointer Register Byte
Frame 4 Data Byte 2
1
Start By
Master
ACK By
TMP431 A/31CA/32
ACK By
TMP431 A/31CA/32
ACK By
TMP431 A/
31C
A/32
Stop By
Master
1 9 1
1
D7 D6 D5 D4 D3 D2 D1 D0
9
Frame 3 Data Byte 1
ACK By
TMP431 A/31CA/32
1
D7
SDA
(Continued)
SCL
(Continued)
D6 D5 D4 D3 D2 D1 D0
9
9
SDA
SCL
0 0 1 1 0 0(1) R/W
P7 P6 P5 P4 P3 P2 P1 P0 ¼
¼
NOTE (1): Slave address 1001100 (TMP431A/32A/31C) shown. Slave address changes for TMP431B/32B/31D. See table for more details.Ordering Information
TMP431
TMP432
www.ti.com SBOS441F –SEPTEMBER 2009–REVISED AUGUST 2013
Figure 19. Two-Wire Timing Diagram for Write Word Format
Figure 20. Two-Wire Timing Diagram for Single-Byte Read Format
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