Datasheet

TMP431
TMP432
SBOS441F –SEPTEMBER 2009–REVISED AUGUST 2013 www.ti.com
Status Registers (continued)
TMP432 Status Register
Table 6. TMP432 Status Register Format
TMP432 STATUS REGISTER (Read = 02h, Write = NA)
BIT # D7 D6 D5 D4 D3 D2 D1 D0
BIT NAME BUSY 0 0 HIGH LOW OPEN THERM 0
POR VALUE 0
(1)
0 0 0 0 0 0 0
(1) The BUSY bit changes to ‘1’ almost immediately (<< 100μs) following power-up, as the TMP432 begins the first temperature conversion.
It is high whenever the TMP432 is converting a temperature reading.
space
The TMP432 has a Status Register to report the state The AL/TH bit does not affect the Status Register
of the temperature comparators. Table 6 shows the LOW bit. The LOW bit reads as '1' if any of the
Status Register bits. The Status Register is read-only temperature channels go beyond the programmed
and is read by reading from pointer address 02h. low limit since the last clearing of the Status Register.
The BUSY bit reads as ‘1’ if the ADC is making a The values of the LOW and OPEN bits (as well as
conversion. It reads as ‘0’ if the ADC is not HIGH when AL/TH is '0') are latched and read as '1'
converting. until the Status Register is read or a device reset
occurs. These bits are cleared by reading the Status
The OPEN bit reads as ‘1’ if the remote transistor
Register, if the condition causing the flag to be set no
was detected as open since the last read of the
longer exists.
Status Register. The OPEN status is only detected
when the ADC is attempting to convert a remote The values of BUSY and THERM (as well as HIGH
temperature. when AL/TH is ‘1’) are not latched and are not
cleared by reading the Status Register. They always
The THERM bit reads as '1' if the temperature from
indicate the current state, and are updated
any channel (remote or local) has exceeded the
appropriately at the end of the corresponding ADC
THERM limit and remains greater than the THERM
conversion. Clearing the Status Register bits does not
limit less the value in the shared Hysteresis Register;
clear the state of the ALERT pin; an SMBus alert
see Figure 23.
response address command must be used to clear
the ALERT pin.
The HIGH bit value depends on the state of the
AL/TH bit in the Configuration Register 1. If the
The TMP432 NORs HIGH, LOW, and OPEN, so a
AL/TH bit is '0', the HIGH bit reads '1' if any of the
status change for any of these flags from ‘0’ to ‘1’
temperature channels go beyond the programmed
automatically causes the ALERT pin to go low (only
high limit since the last clearing of the Status
applies when the ALERT/THERM2 pin is configured
Register. If the AL/TH bit is '1', the HIGH limit is used
for ALERT mode).
to implement THERM2 function. The HIGH bit reads
as '1' if the temperature exceeds the high limit less
the value in the Hysteresis Register.
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