Datasheet

DX1
DX2
DX3
DX4
SCL
SDA
V+
Q0
Address=1001100 Address=1001101 Address=1001110 Address=1001111
Q1
Q2
Q3
Q4
Q5
V+
SCL
SDA
GND
Q7
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
Q6
TMP421
TMP422
TMP423
SBOS398C –JULY 2007–REVISED MAY 2012 www.ti.com
SERIAL BUS ADDRESS DXN connection should be left unconnected. The
polarity of the transistor for external channel 2 (pins 3
To communicate with the TMP421/22/23, the master
and 4) sets the least significant bit of the slave
must first address slave devices via a slave address
address. The polarity of the transistor for external
byte. The slave address byte consists of seven
channel 1 (pins 1 and 2) sets the next least
address bits, and a direction bit indicating the intent
significant bit of the slave address.
of executing a read or write operation.
Table 9. TMP421 Slave Address Options
Two-Wire Interface Slave Device Addresses
TWO-WIRE SLAVE
The TMP421 supports nine slave device addresses
ADDRESS A1 A0
and the TMP422 supports four slave device
0011 100 Float 0
addresses. The TMP423 has one of two factory-
0011 101 Float 1
preset slave addresses.
0011 110 0 Float
The slave device address for the TMP421 is set by
0011 111 1 Float
the A1 and A0 pins according to Table 9.
0101 010 Float Float
The slave device address for the TMP422 is set by
1001 100 0 0
the connections between the external transistors and
1001 101 0 1
the TMP422 according to Figure 15 and Table 10. If
1001 110 1 0
one of the channels is unused, the respective DXP
1001 111 1 1
connection should be connected to GND, and the
Table 10. TMP422 Slave Address Options
TWO-WIRE SLAVE ADDRESS DX1 DX2 DX3 DX4
1001 100 DXP1 DXN1 DXP2 DXN2
1001 101 DXP1 DXN1 DXN2 DXP2
1001 110 DXN1 DXP1 DXP2 DXN2
1001 111 DXN1 DXP1 DXN2 DXP2
Figure 15. TMP422 Connections for Device Address Setup
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Product Folder Link(s): TMP421 TMP422 TMP423