Datasheet

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SBOS323A − DECEMBER 2004 − REVISED JUNE 2005
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6
60ms
120ms
50
µ
A(active)
20
µ
A(idle)
Figure 2. Conversion Time and Period
Timing Diagrams
The TMP125 is SPI-compatible. Figure 3 and Figure 4
describe the output data of the TMP125. Figure 5,
Figure 6, and Figure 7 describe the various timing
requirements, with parameters defined in Table 3.
PARAMETER MIN MAX UNITS
SCK Period t
1
100 ns
Data In to Rising Edge SCK Setup Time t
2
20 ns
SCK Falling Edge to Output Data Delay t
3
30 ns
SCK Rising Edge to Input Data Hold Time t
4
20 ns
CS to Rising Edge SCK Set-Up Time t
5
40 ns
CS to Output Data Delay t
6
30 ns
CS Rising Edge to Output High Impedance t
7
30 ns
Table 3. Timing Description
SO
SCK
CS
T0T0T0T0T0T0T1T2T3T4T5T6T7T8T9
Leading
Zero
SI
Don’t
Care
Don’t
Care
Power
Down
To enter shutdown mode, SI must be high on the rising edge of the third bit of SCK (see the Communicating with the TMP125 section).
Figure 3. Data READ
SO
SCK
CS
T0T0T0T0T0T0T1T2T3T4T5T6T7T8T9
Leading
Zero
SI
Don’t
Care
Don’t
Care
Power
Down
One−
Shot
Figure 4. One-Shot Command