Datasheet

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SLLS672A − OCTOBER 2005 − REVISED JANUARY 2006
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9
SLAVE MODE OPERATIONS
The TMP106 can operate as a slave receiver or slave
transmitter.
Slave Receiver Mode:
The first byte transmitted by the master is the slave
address, with the R/W
bit LOW. The TMP106 then
acknowledges reception of a valid address. The next byte
transmitted by the master is the Pointer Register. The
TMP106 then acknowledges reception of the Pointer
Register byte. The next byte or bytes are written to the
register addressed by the Pointer Register. The TMP106
acknowledges reception of each data byte. The master
may terminate data transfer by generating a START or
STOP condition.
Slave Transmitter Mode:
The first byte is transmitted by the master and is the slave
address, with the R/W
bit HIGH. The slave acknowledges
reception of a valid slave address. The next byte is
transmitted by the slave and is the most significant byte of
the register indicated by the Pointer Register. The master
acknowledges reception of the data byte. The next byte
transmitted by the slave is the least significant byte. The
master acknowledges reception of the data byte. The
master may terminate data transfer by generating a
Not-Acknowledge on reception of any data byte, or
generating a START or STOP condition.
SMBus ALERT FUNCTION
The TMP106 supports the SMBus Alert function. When
the TMP106 is operating in Interrupt Mode (TM = 1), the
ALERT pin of the TMP106 may be connected as an
SMBus Alert signal. When a master senses that an ALERT
condition is present on the ALERT line, the master sends
an SMBus Alert command (00011001) on the bus. If the
ALERT pin of the TMP106 is active, the devices will
acknowledge the SMBus Alert command and respond by
returning its slave address on the SDA line. The eighth bit
(LSB) of the slave address byte will indicate if the
temperature exceeding T
HIGH
or falling below T
LOW
caused the ALERT condition. This bit will be HIGH if the
temperature is greater than or equal to T
HIGH
. This bit will
be LOW if the temperature is less than T
LOW
. Refer to
Figure 7 for details of this sequence.
If multiple devices on the bus respond to the SMBus Alert
command, arbitration during the slave address portion of
the SMBus Alert command will determine which device
will clear its ALERT status. If the TMP106 wins the
arbitration, its ALERT pin will become inactive at the
completion of the SMBus Alert command. If the TMP106
loses the arbitration, its ALERT pin will remain active.
GENERAL CALL
The TMP106 responds to a Two-Wire General Call
address (0000000) if the eighth bit is 0. The device will
acknowledge the General Call address and respond to
commands in the second byte. If the second byte is
00000100, the TMP106 will latch the status of the address
pin, but will not reset. If the second byte is 00000110, the
TMP106 will latch the status of the address pin and reset
the internal registers to their power-up values.
HIGH-SPEED MODE
In order for the Two-Wire bus to operate at frequencies
above 400kHz, the master device must issue an Hs-mode
master code (00001XXX) as the first byte after a START
condition to switch the bus to high-speed operation. The
TMP106 will not acknowledge this byte, but will switch its
input filters on SDA and SCL and its output filters on SDA
to operate in Hs-mode, allowing transfers at up to 3.4MHz.
After the Hs-mode master code has been issued, the
master will transmit a Two-Wire slave address to initiate a
data transfer operation. The bus will continue to operate in
Hs-mode until a STOP condition occurs on the bus. Upon
receiving the STOP condition, the TMP106 will switch the
input and output filters back to fast-mode operation.
TIMEOUT FUNCTION
The TMP106 will reset the serial interface if either SCL or
SDA are held LOW for 54ms (typ) between a START and
STOP condition. The TMP106 will release the bus if it is
pulled LOW and will wait for a START condition. To avoid
activating the timeout function, it is necessary to maintain
a communication speed of at least 1kHz for SCL operating
frequency.