Datasheet
TMP105
www.ti.com
SLLS648D –FEBRUARY 2005– REVISED SEPTEMBER 2011
Both operational modes are represented in Figure 3. Table 9 and Table 10 describe the format for the T
HIGH
and
T
LOW
Registers. Note that the most significant byte is sent first, followed by the least significant byte. Power-up
reset values for T
HIGH
and T
LOW
are:
T
HIGH
= 80°C and T
LOW
= 75°C
The format of the data for T
HIGH
and T
LOW
is the same as for the Temperature Register.
Table 9. Bytes 1 and 2 of T
HIGH
Register
BYTE D7 D6 D5 D4 D3 D2 D1 D0
1 H11 H10 H9 H8 H7 H6 H5 H4
BYTE D7 D6 D5 D4 D3 D2 D1 D0
2 H3 H2 H1 H0 0 0 0 0
Table 10. Bytes 1 and 2 of T
LOW
Register
BYTE D7 D6 D5 D4 D3 D2 D1 D0
1 L11 L10 L9 L8 L7 L6 L5 L4
BYTE D7 D6 D5 D4 D3 D2 D1 D0
2 L3 L2 L1 L0 0 0 0 0
All 12 bits for the Temperature, T
HIGH
, and T
LOW
Registers are used in the comparisons for the ALERT function
for all converter resolutions. The three LSBs in T
HIGH
and T
LOW
can affect the ALERT output even if the converter
is configured for 9-bit resolution.
SERIAL INTERFACE
The TMP105 operates only as a slave device on the Two-Wire bus and SMBus. Connections to the bus are
made via the open-drain I/O lines SDA and SCL. The SDA and SCL pins feature integrated spike suppression
filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP105 supports the
transmission protocol for fast (1kHz to 400kHz) mode. All data bytes are transmitted MSB first.
SERIAL BUS ADDRESS
To communicate with the TMP105, the master must first address slave devices via a slave address byte. The
slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or
write operation.
The TMP105 features one address pin allowing up to two devices to be connected per bus. Pin logic levels are
described in Table 11. The address pin of the TMP105 is read after reset, at start of communication, or in
response to a Two-Wire address acquire request. Following reading of the state of the pin, the address is latched
to minimize power dissipation associated with detection.
Table 11. Address Pin and Slave Addresses for the
TMP105
A0 SLAVE ADDRESS
0 1001000
1 1001001
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