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Startup Startof
Conversion
Delay
(1)
26ms
26ms
TMP102
SBOS397C –AUGUST 2007–REVISED OCTOBER 2012
www.ti.com
After power-up or general-call reset, the TMP102
immediately starts a conversion, as shown in
Figure 9. The first result is available after 26ms
(typical). The active quiescent current during
conversion is 40μA (typical at +27°C). The quiescent
current during delay is 2.2μA (typical at +27°C).
(1) Delay is set by CR1 and CR0.
Figure 9. Conversion Start
SHUTDOWN MODE (SD)
The Shutdown mode bit saves maximum power by
shutting down all device circuitry other than the serial
Figure 10. Output Transfer Function Diagrams
interface, reducing current consumption to typically
less than 0.5μA. Shutdown mode is enabled when
the SD bit is '1'; the device shuts down when current FAULT QUEUE (F1/F0)
conversion is completed. When SD is equal to '0', the
A fault condition exists when the measured
device maintains a continuous conversion state.
temperature exceeds the user-defined limits set in the
T
HIGH
and T
LOW
registers. Additionally, the number of
THERMOSTAT MODE (TM)
fault conditions required to generate an alert may be
programmed using the fault queue. The fault queue is
The Thermostat mode bit indicates to the device
provided to prevent a false alert as a result of
whether to operate in Comparator mode (TM = 0) or
environmental noise. The fault queue requires
Interrupt mode (TM = 1). For more information on
consecutive fault measurements in order to trigger
comparator and interrupt modes, see the High- and
the alert function. Table 9 defines the number of
Low-Limit Registers section.
measured faults that may be programmed to trigger
an alert condition in the device. For T
HIGH
and T
LOWPOLARITY (POL)
register format and byte order, see the High- and
The Polarity bit allows the user to adjust the polarity
Low-Limit Registers section.
of the ALERT pin output. If POL = 0, the ALERT pin
will be active low, as shown in Figure 10. For POL =
Table 9. TMP102 Fault Settings
1, the ALERT pin will be active high, and the state of
F1 F0 CONSECUTIVE FAULTS
the ALERT pin is inverted.
0 0 1
0 1 2
1 0 4
1 1 6
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