Datasheet
TMP100−EP
DIGITAL TEMPERATURE SENSOR
WITH I
2
C INTERFACE
SGLS254B − JULY 2005 − REVISED OCTOBER 2013
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
high and low limit registers
In comparator mode (TM = 0), the ALERT pin of the TMP101 becomes active when the temperature equals or
exceeds the value in T
HIGH
and generates a consecutive number of faults according to fault bits F1 and F0. The
ALERT pin remains active until the temperature falls below the indicated T
LOW
value for the same number of
faults.
In Interrupt Mode (TM = 1) the ALERT Pin becomes active when the temperature equals or exceeds T
HIGH
for
a consecutive number of fault conditions. The ALERT pin remains active until a read operation of any register
occurs or the device successfully responds to the SMBus Alert Response Address. The ALERT pin will also be
cleared if the device is placed in Shutdown Mode. Once the ALERT pin is cleared, it will only become active again
by the temperature falling below T
LOW
. When the temperature falls below T
LOW
, the ALERT pin becomes active
and remains active until cleared by a read operation of any register or a successful response to the SMBus Alert
Response Address. Once the ALERT pin is cleared, the above cycle repeats with the ALERT pin becoming
active when the temperature equals or exceeds T
HIGH
. The ALERT pin can also be cleared by resetting the
device with the General Call Reset command. This also clears the state of the internal registers in the device
returning the device to Comparator Mode (TM = 0).
The ALERT pin function for both operational modes is represented in Figure 3. Table 9 and Table 10 describe
the format for the T
HIGH
and T
LOW
registers. Power-up reset values for T
HIGH
and T
LOW
are: T
HIGH
= 80°C and
T
LOW
= 75°C. The format of the data for T
HIGH
and T
LOW
is the same as for the temperature register.
All 12 bits for the temperature, T
HIGH
, and T
LOW
registers are used in the comparisons for the ALERT function
for all converter resolutions. The three LSBs in T
HIGH
and T
LOW
can affect the ALERT output even if the
converter is configured for 9-bit resolution.
Byte D7 D6 D5 D4 D3 D2 D1 D0
1 H11 H10 H9 H8 H7 H6 H5 H4
Byte D7 D6 D5 D4 D3 D2 D1 D0
2 H3 H2 H1 H0 0 0 0 0
Table 9. Bytes 1 and 2 of T
HIGH
Register
Byte D7 D6 D5 D4 D3 D2 D1 D0
1 L11 L10 L9 L8 L7 L6 L5 L4
Byte D7 D6 D5 D4 D3 D2 D1 D0
2 L3 L2 L1 L0 0 0 0 0
Table 10. Bytes 1 and 2 of T
LOW
Register