Datasheet

TMP100−EP
DIGITAL TEMPERATURE SENSOR
WITH I
2
C INTERFACE
SGLS254B − JULY 2005 − REVISED OCTOBER 2013
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
I/O
Control
Interface
SCL
SDA
Pointer
Register
Temperature
Register
Configuration
Register
T
LOW
Register
T
HIGH
Register
Figure 2. Internal Register Structure of TMP100 and TMP101
P7 P6 P5 P4 P3 P2 P1 P0
0 0 0 0 0 0 Register Bits
Table 1. Pointer Register Byte
P1 P0 REGISTER
0 0 Temperature Register (READ Only)
0 1 Configuration Register (READ/WRITE)
1 0 T
LOW
Register (READ/WRITE)
1 1 T
HIGH
Register (READ/WRITE)
Table 2. Pointer Addresses of the TMP100 Registers