Datasheet

TMP100−EP
DIGITAL TEMPERATURE SENSOR
WITH I
2
C INTERFACE
SGLS254B − JULY 2005 − REVISED OCTOBER 2013
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
serial interface
The TMP100 and TMP101 operate only as slave devices on the I
2
C bus and SMBus. Connections to the bus
are made via the open-drain I/O lines SDA and SCL. The TMP100 and TMP101 support the transmission
protocol for fast (up to 400 kHz) and high-speed (up to 3.4 MHz) modes. All data bytes are transmitted most
significant bit first.
serial bus address
To program the TMP100 and TMP101, the master must first address slave devices via a slave address byte.
The slave address byte consists of seven address bits and a direction bit indicating the intent of executing a
read or write operation.
The TMP100 features two address pins to allow up to eight devices to be addressed on a single I
2
C interface.
Table 11 describes the pin logic levels used to properly connect up to eight devices. Float indicates the pin is
left unconnected. The state of pins ADD0 and ADD1 is sampled on the first I
2
C bus communication and should
be set prior to any activity on the interface.
ADD1 ADD0 SLAVE ADDRESS
0 0 1001000
0 Float 1001001
0 1 1001010
1 0 1001100
1 Float 1001101
1 1 1001110
Float 0 1001011
Float 1 1001111
Table 11. Address Pins and Slave Addresses for TMP100
The address pins of the TMP100 and TMP101 are read after reset or in response to an I
2
C address acquire
request. Following a read, the state of the address pins is latched to minimize power dissipation associated with
detection.