Datasheet
RM46L450
RM46L850
SPNS184A –SEPTEMBER 2012–REVISED SEPTEMBER 2013
www.ti.com
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
This data manual revision history highlights the technical changes made to the initial revision of the
device-specific data manual to make it an A revision.
Document Revision History
Section Change From To
Section 3.1 Increased absolute max voltage V
CCIO
and Input Voltage 4.1 V 4.6 V
Section 3.1 Max Junction temp 150 C 130 C
Section 3.2 Added maximum supply voltage slew rate 1 V/µs
Added table of control bits for programmable 8 mA-2 mA
Table 3-3
buffers
Section 3.4 Revised wait state requirements
Deleted all entries
except read from one
Section 3.5 Flash Currents bank while
programming or
erasing another bank
Section 3.5 I
CCIO
15 mA 10 mA
Added note that PBIST and LBIST currents are typically
Section 3.5
not used for thermal calculations
Section 3.6 V
OH
, I
OH
= 50 µA, standard output mode V
CCIO
-0.2 V
CCIO
-0.3
Section 3.6 Input clamp current -2 mA -3.5 mA
Section 3.6 Input clamp current 2 mA 3.5 mA
Table 3-5 Corrected rise/fall time of 8/2 mA buffers in 8 mA mode
Table 4-1 Vmon Vcc Low minimum 0.8 V 0.75 V
Table 4-1 Vmon Vcc low maximum 1.0 V 1.13 V
Table 4-1 Vmon Vccio Low minimum 1.9 V 1.85 V
Table 4-11 Added PLL VCO min freq 150 MHz
Table 4-9 Changed OSCIN max Square 12.5 ns 50 ns
Table 4-10 Added limits for when the HFLPO has been trimmed
Table 4-6 Corrected nRST timings 8 t
c(VCLK)
32 t
c(VCLK)
Changed glitch filter minimum times for nRST, nPORRST
Table 4-20 500 475 ns
and TEST
Table 4-24 Updated Sector/Bank erase times
Section 4.14 Updated EMIF timings
Flash (ATCM) - ECC TCM - ECC live lock
Table 4-36 Corrected title of live lock ESM event
live lock detect detect
Table 4-40 JTAG #2 24 ns 26 ns
Table 4-40 JTAG #5 10 ns 12 ns
Table 5-21 Added t
d(PU-ADV)
parameter to ADC
Table 5-20 Updated ADC leakage table
Table 5-27 Corrected units in I
2
C spec ms µs
Section 5.11.4
Updated SPI timings
Section 5.11.5
Section 5.12.2 Added RMII mode timings
Changed MDIO timing #4 and added note 10 ns 26 ns
Table 5-42 Updated USB timings
Table 6-2 Updated Die-ID register
Section 6.4 Added section for module certifications
8 Contents Copyright © 2012–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: RM46L450 RM46L850