Datasheet
RM46L450
RM46L850
SPNS184A –SEPTEMBER 2012–REVISED SEPTEMBER 2013
www.ti.com
5.13 Universal Serial Bus Controller
5.13.1 Features
This device provides several varities of USB functionality, including:
• One full-speed USB device port compatible with the USB Specification Revision 2.0 and USB
Specification Revision 1.1
• Two USB host ports compatible with USB Specification Revision 2.0, which is based on the OHCI
Specification For USB Release 1.0.
5.13.2 Electrical and Timing Specifications
Table 5-41. Full-Speed USB Interface Timing Requirements
NO. Parameter MIN MAX Unit
FSU20 t
d(VPL, VML)
Host time duration, RCVDPLS and 15 ns
RCVDMNS low together during
transition
(1)
Device time duration, RCVDPLS and 15 ns
RCVDMNS low together during
transition
FSU21 t
d(VPH, VMH)
Host time duration, RCVDPLS and 15 ns
RCVDMNS high together during
transition
(1)
Device time duration, RCVDPLS and 15 ns
RCVDMNS high together during
transition
(1) Applies to both host ports, USB1 and USB2
Table 5-42. Full-Speed USB Interface Switching Characteristics
(1)
NO. Parameter MIN MAX Unit
FSU15 t
d(TXENL–DATV)
Host delay time TXENL active to -2.3 2.1 ns
TXDPLS valid
(2)
Device delay time TXENL active to -2.6 0.8 ns
TXDPLS valid
FSU16 t
d(TXENL–SE0V)
Host delay time TXENL active to -2.9 1.8 ns
TXSE0 valid
(2)
Device delay time TXENL active to -1.7 1.0 ns
TXSE0 valid
FSU17 t
s(DAT–SE0)
Host skew between TXDPLS and 0 1.7 ns
TXSE0 transition
(2)
Device skew between TXDPLS and 0 2.1 ns
TXSE0 transition
FSU18 t
d(TXENH–DATI)
Host delay time TXENL inactive to -2.0 2.2 ns
TXDPLS invalid
(2)
Device delay time TXENL inactive to -2.0 0.7 ns
TXDPLS invalid
FSU19 t
d(TXENH–SE0I)
Host delay time TXENL inactive to -2.6 1.9 ns
TXSE0 invalid
(2)
Device delay time TXENL inactive to -1.3 0.9 ns
TXSE0 invalid
(1) The capacitive loading is equivalent to 15 pF
(2) Applies to both host ports, USB1 and USB2
168 Peripheral Information and Electrical Specifications Copyright © 2012–2013, Texas Instruments Incorporated
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