Datasheet

MDCLK
MDIO
(output)
1
7
3
MDCLK
MDIO
(input)
1
3
4
5
RM46L450
RM46L850
www.ti.com SPNS184A –SEPTEMBER 2012–REVISED SEPTEMBER 2013
5.12.3 Management Data Input/Output (MDIO)
Figure 5-25. MDIO Input Timing
Table 5-39. MDIO Input Timing Requirements
NO. Parameter Value Unit
MIN MAX
1 tc(MDCLK) Cycle time, MDCLK 400 - ns
2 tw(MDCLK) Pulse duration, MDCLK high/low 180 - ns
3 tt(MDCLK) Transition time, MDCLK - 5 ns
4 tsu(MDIO-MDCLKH) Setup time, MDIO data input valid before MDCLK 33
(1)
- ns
High
5 th(MDCLKH-MDIO) Hold time, MDIO data input valid after MDCLK 10 - ns
High
(1) This is a discrepancy to IEEE 802.3, but is compatible with many PHY devices.
Figure 5-26. MDIO Output Timing
Table 5-40. MDIO Output Timing Requirements
NO. Parameter Value Unit
MIN MAX
1 tc(MDCLK) Cycle time, MDCLK 400 - ns
7 td(MDCLKL-MDIO) Delay time, MDCLK low to MDIO data output -7 100 ns
valid
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