Datasheet

1 2
MII_MRCLK
MII_MRXD
MII_MRXDV
MII_MRXER
VALID
RM46L450
RM46L850
SPNS184A –SEPTEMBER 2012–REVISED SEPTEMBER 2013 www.ti.com
5.12 Ethernet Media Access Controller
The Ethernet Media Access Controller (EMAC) provides an efficient interface between the CPU and the
network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps
in either half- or full-duplex mode, with hardware flow control and quality of service (QoS) support.
The EMAC controls the flow of packet data from the RM4x device to the PHY. The MDIO module controls
PHY configuration and status monitoring.
Both the EMAC and the MDIO modules interface to the RM4x device through a custom interface that
allows efficient data transmission and reception. This custom interface is referred to as the EMAC control
module, and is considered integral to the EMAC/MDIO peripheral. The control module is also used to
multiplex and control interrupts.
5.12.1 Ethernet MII Electrical and Timing Specifications
Figure 5-22. MII Receive Timing
Table 5-36. MII Receive Timing
Parameter Description MIN MAX
t
su(MIIMRXD)
Setup time, MIIMRXD to MIIMRCLK rising edge 8ns
t
su(MIIMRXDV)
Setup time, MIIMRXDV to MIIMRCLK rising edge 8ns
t
su(MIIMRXER)
Setup time, MIIMRXER to MIIMRCLK rising edge 8ns
t
h(MIIMRXD)
Hold time, MIIMRXD valid after MIIRCLK rising edge 8ns
t
h(MIIMRXDV)
Hold time, MIIMRXDV valid after MIIRCLK rising edge 8ns
t
h(MIIMRXER)
Hold time, MIIMRXDV valid after MIIRCLK rising edge 8ns
164 Peripheral Information and Electrical Specifications Copyright © 2012–2013, Texas Instruments Incorporated
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