Datasheet

AM1808

www.ti.com

SPRS653E –FEBRUARY 2010–REVISED MARCH 2014

Table 6-8. Power and Sleep Controller (PSC) Registers (continued)

PSC0 BYTE PSC1 BYTE

ACRONYM REGISTER DESCRIPTION

ADDRESS ADDRESS

- 0x01E2 7A74 MDCTL29 Module 29 Control Register

- 0x01E2 7A78 MDCTL30 Module 30 Control Register

- 0x01E2 7A7C MDCTL31 Module 31 Control Register

6.8.1 Power Domain and Module Topology

The device includes two PSC modules.

Each PSC module controls clock states for several of the on chip modules, controllers and interconnect

components. and lists the set of peripherals/modules that are controlled by the PSC, the power domain

they are associated with, the LPSC assignment and the default (power-on reset) module states. See the

device-specific data manual for the peripherals available on a given device. The module states and

terminology are defined in .

PSC0 Default Module Configuration

LPSC Module Name Power Domain Default Module State Auto Sleep/Wake Only

Number

0 EDMA3 Channel Controller 0 AlwaysON (PD0) SwRstDisable —

1 EDMA3 Transfer Controller 0 AlwaysON (PD0) SwRstDisable —

2 EDMA3 Transfer Controller 1 AlwaysON (PD0) SwRstDisable —

3 EMIFA (Br7) AlwaysON (PD0) SwRstDisable —

4 SPI 0 AlwaysON (PD0) SwRstDisable —

5 MMC/SD 0 AlwaysON (PD0) SwRstDisable —

6 ARM Interrupt Controller AlwaysON (PD0) SwRstDisable —

7 ARM RAM/ROM AlwaysON (PD0) Enable Yes

8 — — — —

9 UART 0 AlwaysON (PD0) SwRstDisable —

10 SCR0 (Br 0, Br 1, Br 2, Br 8) AlwaysON (PD0) Enable Yes

11 SCR1 (Br 4) AlwaysON (PD0) Enable Yes

12 SCR2 (Br 3, Br 5, Br 6) AlwaysON (PD0) Enable Yes

13 PRUSS AlwaysON (PD0) SwRstDisable —

14 ARM AlwaysON (PD0) SwRstDisable —

15 — — — —

Submit Documentation Feedback

Product Folder Links: AM1808