Datasheet

AM1808
www.ti.com SPRS653E –FEBRUARY 2010–REVISED MARCH 2014
6.25.3 HPI Electrical Data/Timing
Table 6-108. Timing Requirements for Host-Port Interface [1.3V, 1.2V, 1.1V]
(1) (2)
1.3V, 1.2V, 1.1V,
1.0V
NO. UNIT
MIN MAX
1 t
su(SELV-HSTBL)
Setup time, select signals
(3)
valid before UHPI_HSTROBE low 5 ns
2 t
h(HSTBL-SELV)
Hold time, select signals
(3)
valid after UHPI_HSTROBE low 2 ns
3 t
w(HSTBL)
Pulse duration, UHPI_HSTROBE active low 15 ns
4 t
w(HSTBH)
Pulse duration, UHPI_HSTROBE inactive high between consecutive accesses 2M ns
9 t
su(SELV-HASL)
Setup time, selects signals valid before UHPI_HAS low 5 ns
10 t
h(HASL-SELV)
Hold time, select signals valid after UHPI_HAS low 2 ns
11 t
su(HDV-HSTBH)
Setup time, host data valid before UHPI_HSTROBE high 5 ns
12 t
h(HSTBH-HDV)
Hold time, host data valid after UHPI_HSTROBE high 2 ns
Hold time, UHPI_HSTROBE high after UHPI_HRDY low. UHPI_HSTROBE
13 t
h(HRDYL-HSTBH)
should not be inactivated until UHPI_HRDY is active (low); otherwise, HPI writes 2 ns
will not complete properly.
16 t
su(HASL-HSTBL)
Setup time, UHPI_HAS low before UHPI_HSTROBE low 5 ns
17 t
h(HSTBL-HASH)
Hold time, UHPI_HAS low after UHPI_HSTROBE low 2 ns
(1) UHPI_HSTROBE refers to the following logical operation on UHPI_HCS, UHPI_HDS1, and UHPI_HDS2: [NOT(UHPI_HDS1 XOR
UHPI_HDS2)] OR UHPI_HCS.
(2) M=SYSCLK2 period in ns.
(3) Select signals include: HCNTL[1:0], HR/W and HHWIL.
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